The Parallel And Distributed System Architecture TRC Laboratory was newly founded in FY1997. With only two members, it is the smallest laboratory at TRC. Currently, R&D is being conducted with the cooperation of some laboratories of optical interconnections and subcontractors.
At TRC, three Parallel And Distributed System Laboratories are jointly undertaking development of a seamless parallel and distributed computing system. The objective is to realize effective parallel processing by using computers throughout the office in LAN environment. Once this system is established, a high-performance computing environment can be constructed at low cost, using commodity personal computers (tagged by greatly improved performance and drastically lowered price in recent years).
Regarding personal computers, many are installed at offices and laboratories nowadays. However, only a small percentage of their maximum computing power is used at a time. In a "seamless" parallel and distributed computing system, currently unused computing power can be exploited in various combinations in various networks.
To construct such a system, a variety of technology should be developed both in software and hardware. Because existing personal computers are not built for parallel processing, there are many technical problems to be solved, among which our laboratory deals with the following:
(2) The capacity of outside communication is relatively smaller than that within a computer.
For (1), our laboratory is trying to establish a light-weight memory-based communication protocol to realize user-level communication without involving system calls. Also, we are developing a network interface to support the protocol at a high speed, in cooperation with other laboratories at TRC. The network interface will be installed on PCI bus, in order to connect many types of computers. Here the protocol processing will be hard-wired, to increase the speed and improve the performance of the entire system. By using memory-base communication, the protection function required in multitask environment can be realized through extension of virtual memory system and a unified communication model can be provided for heterogeneous connection. To offer this memory-base communication at user level, the network interface supports the protection.
For (2), our laboratory will develop networks jointly with Optical Interconnection Laboratories. The optical interconnection will be used as links between computers and the switches. Optical communication has the advantage of little distance restriction, since it is free from communication noise via electrical signals. Therefore, it is suitable for constructing high-speed computer networks connecting scattered computers in LAN environment. We will develop a network switch for optical interconnections and build a high-speed and low-latency network suitable for light-weight memory-base communication. This switch will use ASIC with embedded DRAM.
For LAN environment, networks with severe restriction in topology, such as SAN (System Area Network) or interconnection networks for massively parallel conventional computers, will be difficult to use. Yet, for efficient parallel processing, networks which afford lost packets, such as the current LAN, tend to hardly be allowable. To realize a low-latency and deadlock-free network without packet loss, a buffer for storing many packets is required. This is the case especially in a high-speed network: a vast amount of buffer is required to exploit the bandwidth. Hence, our laboratory will try to form a wide-bandwidth deadlock-free network with little restriction in topology by taking advantage of the ASIC with embedded DRAM.
In FY1997, the laboratory constructed an emulation environment using Myrinet to establish such a system. From this, the protocol is emulated and parallel processing programs are actually executed to evaluate and improve the protocol. In cooperation with subcontractors, we also managed to develop a network interface using PLD (Programmable Logic Device), a LSI which allows for customization of internal circuit; and designed a network switch using ASIC. Although this ASIC does not have embedded DRAM, it can emulate the function of embedded DRAM with external RAM. In FY1998, we will complete the first trial system using the network interface and switches to demonstrate the system's performance; studies will then be done on hardware configuration.
Cooperation of researchers both in architecture and software is essential to build a computer system. Application of optical interconnection to the computer system has a great possibility as well. Realization of such a system -- only attainable through Real World Computing Partnership, where researchers from various fields can work together, is now the lab's main intent.