The objective of our laboratory is to evaluate the performance of parallel systems in various aspects, and to develop a technique for attaining higher performance based on the evaluation results.
The performance of parallel systems can be evaluated by various aspects, as compared with the sequential performance of single processor systems. For example, the performance varies depending on the numbers of processors or arrangements of data and tasks. Current parallel computing environments include a number of variations ranging from work station clusters to massively parallel computers. We can understand what kind of performance is required for a given parallel application, or what performance is obtained with a certain parallel system only through experiences. It makes difficult to switch from a conventional system to a parallel system. For example, the performance of a parallel program depends not only on telecommunication performance, but also on the structure of parallel programs, whereas the performance of a sequential program mainly depends on the fundamental processor cycle. It is now necessary to analyze, beforehand, these evaluations using a pre-existing sequential or parallel program to provide effective support for program developers. Furthermore, we can provide feedback for studies aiming to attain higher performance by suggesting to developers which elements are most important in developing parallel computer architectures (Fig. 1).
Fig.2: Research Themes of Parallel
and Distributed System Performance Tsukuba Laboratory
Fig. 2 shows the research themes of our research laboratory.
We have been studying various fundamental collective telecommunications as a performance index for characterizing parallel systems, collecting data for telecommunications using massively parallel machines and work-stations in the Tsukuba Research Center, and forming a database.
This data is published on the WWW at as fundamental data of a parallel systems performance evaluation, as well as benchmark. This data not only provides users with guidelines for how to utilize parallel systems, but also helps in the bottleneck analysis of parallel systems. Furthermore, a study to develop a technique to analyze programs based on this data, and automatically predict the performance of parallel programs is in progress.
While a simulation analysis is necessary to produce a detailed analysis of parallel system performance, a higher speed is indispensable for a simulation of a large-scale parallel processor. We are in collaboration with Professor Parkıs laboratory at the University of Tsukuba to develop a simulation system which can handle a thousand parallel machines. For the first step toward our goal, we developed "excit," an instrumentation system that adds analysis codes to object program codes. Though this technique is faster than simulations, technique accuracy was a weakness. Currently, we are progressing in our studies of techniques to enhance the accuracy and behavioral visualization of GUI. These studies are expected to enable us to easily analyze high-speed, high-precision cash memory and performance bottlenecks.
Our research laboratory recognizes object-oriented technology as significant technology for the future of parallel programming. Object-oriented technology in a parallel environment simplifies parallel programming by making complicated parallel programming invisible to users. So far, we have developed Template Closure, a technique to remove a temporary variable in operations of sequential objects using C++ template functions. We are planning as a future project to create and release a useful parallel class library that includes this function. Furthermore, we are developing applications using these libraries. In addition to this, we are developing programs for parallel fluid computation and the adaptive grid method in parallel finite element method as parallel object-oriented technology applications.
As a platform for our research laboratory, we have built a system called COMPASS (Cluster of MultiProcessor SyStem), by connecting 8 nodes through a Myrinet and 100 base-T Ether switch, where a node consists of SMP shared memory processor (Toshiba GS700) with a 4 PentiumPro (see Fig. 3). We believe that a distributed memory system using a small-scale SMP as a node will become one type of a cluster-system in the future. Since the structure has both shared and distributed memories, we utilize it as a demonstrative environment for performance evaluation study to clarify unexplored aspects of programming and system performance.
The ultimate objective for our laboratoryıs performance evaluation research is not only to make a result of performance evaluation a means to help user understanding but to go one step further by making the procedure for performance improvement automatic. One way to accomplish this is to use the optimal compiler environment using dynamic information. Dynamic and static information obtained through performance analysis not only suggests programmers ways to improve performance, but also enhances parallel program efficiency in an automatic manner by utilizing dynamic and static information in a compiler. Though the utilization of execution time information in sequential and parallel compilers has been proposed, in actuality, most applications are used mainly for static analysis and practical usage has not yet been reached. In comparison to sequential programs, a dynamic element, the scale of processors, determines how to make parallelization. Therefore, compilers that utilize dynamic information is all the more crucial for parallel environments. We are currently investigating the utilization of dynamic information in compilers and are expecting to start developing these compilers from the next fiscal year.